Designing VHDL to Simulate the Error Correction of Hamming Code

A. Mahmudi, S. Achmadi


The role of error detection and error correction for the data bit by the receiver is very important because the sender does not need to repeat the transmissions. Thus, the speed and reliability in transmitting data information can be maintained. This study aims to implement simulation the Forward Error Correction (FEC) method in verifying and correcting data errors received by using simulation. To support FEC method, study utilizes visual basic software so that it can be used as one of the quasi-experimental modules in the data communication laboratory. The Forward Error Correction (FEC) method is a method that can correct data errors in the receiver. This method uses simulated Hamming codes on the computer so that the detection and correction process can be clearly demonstrated on the monitor screen. This simulation can be used as a quasi-experimental module in a data communication laboratory. The simulation results show that the Hamming code (17, 12) codec has been running as expected.


Simulation, Forward Error Correction (FEC), quasi-experimental module

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